Increasingly exotic inorganic materials are being used in advanced semiconductor devices, even as the integration of these materials into the device fabrication process has proven to be challenging. By way of example, high-κ and metal gate (HKMG) materials have been used to further improve the performance of semiconductor devices (see, for example, “Application of High-κ Gate Dielectrics and Metal Gate Electrodes to enable Silicon and Non-Silicon Logic Nanotechnology”, R. Chau et. al, Microelectronic Engineering, vol. 80, pp. 1-6, 2005). In HKMG devices, a hafnium or zirconium-based compound serves as the gate dielectric, and one or more inorganic oxides (e.g., yttrium oxide (Y2O3), lanthanum oxide (La2O3), and magnesium oxide (MgO)) are used as thin base and capping layers (see, for example, “Systematic Study of Vth Controllability Using ALD-Y2O3, La2O3, and MgO Layers with HfSiON/Metal Gate First n-MOSFETs for hp 32 nm Bulk Devices,” S. Kamiyama et al., IEDM 2008 Proceedings, IEEE). Because the electrical properties of the HKMG layer can depend on the thickness of the capping layers, precise process control is required to make useful devices (see, for example, “Device and Reliability Improvement of HfSiON+LaOx/Metal Gate Stacks for 22 nm Node Application”, J. Huang et al., IEDM 2008 Proceedings, IEEE).
In one example of a HKMG process flow, the capping oxide layer is applied and then patterned by conventional photolithographic processing. Wet etching with an acidic solution may be used to remove the capping layer from selected areas of the substrate. During this process flow, the capping layer is contacted by the process chemicals used to perform the lithographic patterning prior to the last wet etch step. These process chemicals typically include an aqueous developer solution of tetramethyl ammonium hydroxide (TMAH) and water, which is used to rinse all traces of the developer solution from the substrate. Commonly, the rinse water is pretreated with carbon dioxide to increase its conductivity, thereby dissipating charge that might otherwise result in electrostatic damage to the semiconductor devices (see, for example, U.S. Pat. No. 5,175,124 to Winebarger, 1992).